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HIP4086, HIP4086A
Pin Descriptions (Continued)
PIN NUMBER
17
24
14
20
21
22
19
SYMBOL
AHO
BHO
CHO
(xHO)
V DD
ALO
BLO
CLO
DESCRIPTION
High-Side Outputs. Connect to the gates of the High-Side power MOSFETs in each phase.
Positive Supply. Decouple this pin to V SS (Pin 6).
Low-Side Outputs. Connect the gates of the Low-Side power MOSFETs to these pins.
(xLO)
NOTE: x = A, B or C.
Ordering Information
PART NUMBER
PART
TEMP RANGE
CHARGE
PKG.
(Notes 1, 3)
HIP4086AB
HIP4086ABZ (Note 2)
HIP4086APZ (Note 2)
HIP4086AABZ (Note 2)
MARKING
HIP4086AB
HIP4086ABZ
HIP4086APZ
HIP4086AABZ
(°C)
-40 to +125
-40 to +125
-40 to +125
-40 to +125
PUMP
Yes
Yes
Yes
No
PACKAGE
24 Ld SOIC
24 Ld SOIC (Pb-free)
24 Ld PDIP (Pb-free)
24 Ld SOIC (Pb-free)
DWG. #
M24.3
M24.3
E24.3
M24.3
NOTES:
1. Add “-T*”, suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for HIP4086, HIP4086A . For more information on MSL, please see Technical
Brief TB363 .
4
FN4220.9
February 1, 2013
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